1. Field of the Invention
This invention relates in general to means and methods for semiconductor devices and, more particularly, to improved means and mtthods for providing semiconductor devices combining both MOS and bipolar transistors to provide a Darlington type circuit.
2. Background Art
The Darlington circuit configuration is well-known and is frequently used in the semiconductor art to obtain devices which have high gain and high power output. In its most common configuration, the Darlington circuit consists of two devices, connected to a common supply, and with the output of the first (input) device connected to the input of the second (output) device which is in turn connected in series with the load. The input and output devices of the Darlington circuit may be bipolar type devices, MOS type devices, or a mixture of the two. When the input device is formed from an MOS transistor and the output device from a bipolar transistor, the Darlington arrangement has particularly attractive properties.
It is desirable for both performance and economy reasons to build both transistors of the Darlington circuit in a single semiconductor die. In the prior art, the MOS-Bipolar Darlington combination has been implemented by forming a large bipolar transistor on one part of the semiconductor die and a smaller MOS transistor on another part of the die in a side-by-side arrangement. The MOS and bipolar devices are then connected together using surface metallization layers.
Prior art MOS-bipolar Darlington circuits made in this fashion have a number of disadvantages. For example, die area utilization is poor. Thus, a larger and more costly semiconductor die is required to achieve a given power output. Further, devices constructed in this fashion have smaller Safe Operating Area (SOA) and are more susceptible to thermal-runaway since thermal coupling between the MOS and bipolar devices is generally poor and little benefit is derived from the fact that they have compensating current-temperature characteristics. Additionally, when it is desired to add feedback resistors within the circuit, additional die space is required, further increasing the cost and complexity. Thus, there is a need for improved means and methods for constructing monolithic Darlington circuits and devices. As used herein the words device or semiconductor device or semiconductor circuit are intended to include monolithic implementation of circuits comprising one or more transistors, resistors, or other components.
Accordingly, it is an object of the present invention to provide an improved means and method for constructing semiconductor circuits employing MOS and bipolar devices in the same semiconductor die.
It is a further object of the present invention to provide an improved means and method for constructing monolithic Darlington circuits employing MOS and bipolar ransistors in a more compact arrangement to decrease the die area required.
It is an additional object of the present invention to provide an improved means and method for obtaining integrated feedback resistors in Darlington circuits.
It is a further object of the present invention to provide a means and method for improving the thermal stability, more particularly, the safe operating area (SOA) of monolithic Darlington circuits employing MOS and bipolar transistors.
It is a still further object of the present invention to provide improved means and methods for obtaining monolithic Darlington circuits having large electrode contacts for the main power leads so as to minimize series resistance.